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Position
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Education Background
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Qualification
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Senior
Library designer or Library QA Manager
(Hot Job!) |
Bachelor
& Above in EE or related field |
Working
5 to 10 years in standard cell design/cell characterization/low
power circuit design.
With EDA tools/Logic Design flow/Design Methodology background
is a plus.
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Senior
I/O designer
(Hot Job!)
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Bachelor
& Above in EE or related field |
Working
3 to 7 years in special I/O, Circuit design filed.
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Library
Designer
(Hot Job!)
|
Bachelor
& Above in EE or related field |
Working
3 to 5 years in cell design of advanced technology (130nm or
below)
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| IP
Marketing Manager |
Master
& Above in MSEE or MBA with BS in EE/CE or equivalent |
At least 3~5 yrs. experience in semiconductor industry, Marketing
preferred. |
| Layout
Engineer / Manager |
Bachelor
& Above in EE or related field
|
At
least 3 yrs. experience in IC layout field.
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Senior SRAM Design Engineer |
Master & Above in EE |
1. At least 4 yrs. experience in memory design field, like SRAM,
ROM, DRAM.
2. Strong skills in digital and analog circuit design and a
sound understanding of device physics and processing is required.
3. Familiarity with Cadence, Verilog, Hsim, spice, and power
and noise analysis tools a plus.
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| Senior
NVM Design Engineer |
Master
in EE |
1.
At least 4 yrs. experience in flash, EEPROM.
2. Strong Skill in digital and analog design.
3. Familiar with NVM operation and EEPROM emulator.
4. Well knowledge in device physics and testing is a plus.
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Senior special IO Design Engineer
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Master & Above in EE
|
1. At least 4 yrs. experience in high speed IO design field,
like SSTL2, SSTL18, LVDS, etc.
2. Strong skills in digital and analog circuit design and a
sound understanding of device physics and processing is required.
3. Familiarity with Cadence design tool, spice, and power and
noise analysis tools a plus.
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Senior IO library Design Engineer |
Master in EE |
1. At least 4 yrs. experience
in IO library design.
2. Strong Skill in ESD design.
3. Familiar with IO library design, EDA view generation and
QA.
4.Well knowledge in device physics and logic design flow is
a plus.
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Senior Cell Library Design Engineer |
Master & Above in EE |
1. At least 3 yrs. experience in standard cell design field.
2. Strong skills in digital circuit design and a sound understanding
of device physics and processing is required.
3. Familiarity with Composer,Hspice,Verilog, and cell library
characterization tools a plus.
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ASIC Design Engineer |
Bachelor, Master or Above in EE |
1. At least 2 yrs. experience in ASIC design flow and involve
in any following area: RTL coding, Simulation, Synthesis,
DFT, ATPG, DFM, Signal Integrity, Floor-plan, Place &
Route, Physical verification (DRC/LVS); programming/scripting
skill a plus.
2. Familiarity with at least one major ASIC EDA tool from
Cadence, Synopsys, Mentor or Magma
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Senior Circuit Design Staff |
B.S./M.S./PhD in EE/ECE |
1. At least 5 yrs. experience in circuit designs
2. Familiarity with Place & Route, Design Compilers, Circuit
Simulation, and Circuit Analysis tools 3. Experience in delivery,
team & process management 4. Strong written and oral communication
skills
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Senior VLSI Implementation Staff |
B.S./M.S./PhD in EE/ECE |
1. At least 5 yrs. experience in VLSI implementations
2. Strong in design synthesis, Place & Route, and full chip
integration, technology migration.
3. Experience in noise and power analysis of complex VDSM chips.
4. Familiarity with front-end design issues is a plus.
5. Experience in delivery, team & process management
6. Strong written and oral communication skills
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Senior System application Engineer |
Master in EE |
1. At least 3 yrs. experience in Video / Audio / IO interface
system architecture
2. Strong skills in firmware and system architecture design.
3. Familiar with FPGA / DSP
4. Experience in PCB design is a plus.
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RF IC circuit Designer |
Master in EE |
1.At least 3 yrs. experience in the field of RF IC transceiver
design
2. Familiar with RF circuit design (LNA, Mixer, VCO, IF Amplifier,
Limiter, IQ modulator, demodulator ) and also have strong skill
in Cadence and ADS softwares.
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MM/RF design manager |
Master in EE/MSEE |
1. At least 8 yrs. experience in Analog/RF design
2. Strong design skill in MM/RF field.
3. Familiar with ADC/DAC/PLL , High speed serial interface or
wireless transceiverdesign.
4. Project and Team management experience is a
must.
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