UMC and Synopsys Develop Reference Flow for UMC's Advanced Deep Submicron Processes

Collaboration Validates Synopsys' Galaxy Design Platform for UMC's 0.13 micron Process

MOUNTAIN VIEW, Calif., and HSINCHU, Taiwan, May 3, 2004 - Synopsys, Inc. (Nasdaq:SNPS), the world leader in semiconductor design software, and UMC (NYSE: UMC; TSE: 2303), a world-leading semiconductor foundry, today announced that the two companies have collaborated to develop a reference design flow based on Synopsys' Galaxy^TM Design Platform and UMC's 0.13 micron process. To validate the effectiveness of the reference design flow, Synopsys' Advanced Technology Group designed and taped out a test chip tailored to UMC's 0.13 micron process to study signal integrity and inductance effects as well as the multi-threshold voltage power optimization design technique. The successful development of the test chip helps demonstrate the effectiveness of the Galaxy Design Platform in handling the intricate design rules inherent in deep submicron system-on-chip (SoC) design.

"As process technologies and SoC designs become increasingly complex, UMC continues to expand our design support capabilities to help customers increase their chance of first silicon success," said Ken Liou, director of the Design Support division at UMC. "Working with an industry leader like Synopsys gives UMC and its customers access to a validated reference flow that reduces risk and speeds time to market. This collaboration helps ensure that the performance and capabilities of the Galaxy Design Platform can work smoothly in a UMC process flow."

The Galaxy Design Platform is an open, integrated design implementation platform, enabling advanced semiconductor design. Anchored by Synopsys' industry-leading semiconductor implementation tools and the open Milkyway^TM database, the Galaxy Design Platform incorporates consistent timing, common libraries, delay calculation, constraints, testability, and physical verification from RTL all the way to silicon.

"Synopsys works with world-class foundries like UMC to solve our mutual customers' timing closure, and verification challenges, "said Rich Goldman, vice president of Strategic Market Development at Synopsys. "This collaboration is important to help ensure that Synopsys' Galaxy Design Platform offers UMC customers a complete, reliable RTL-to-GDSII design flow. We will continue to work with UMC to address future challenges of even deeper submicron processes."

Availability
The UMC/Synopsys reference design flow is available today and can be accessed from UMC's website at http://my.umc.com. The reference design flow was co-developed by UMC and Synopsys Professional Services and uses industry-leading Synopsys EDA tools including Design Compiler, DFT Compiler^TM, VCS, Formality, Physical Compiler, Astro^TM, PrimeTime, Star-RCXT^TM, and Hercules^TMPVS.

About UMC
UMC (NYSE: UMC, TSE: 2303) is a leading global semiconductor foundry that manufactures advanced process ICs for applications spanning every major sector of the semiconductor industry. UMC delivers cutting-edge foundry technologies that enable sophisticated system-on-chip (SOC) designs, including 90nm copper, 0.13um copper, embedded DRAM, and mixed signal/RFCMOS. UMC is also a leader in 300mm manufacturing; Fab 12A in Taiwan is currently in volume production for a variety of customer products, while Singapore-based UMCi has just entered volume production. UMC employs over 8,500 people worldwide and has offices in Taiwan, Japan, Singapore, Europe, and the United States. UMC can be found on the web at http://www.umc.com.

About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com.

Synopsys, Design Compiler, Physical Compiler, PrimeTime, Formality and VCS are registered trademarks of Synopsys, Inc. Astro, DFT Compiler, Galaxy, Hercules, Milkyway, and Star-RCXT are trademarks of Synopsys. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

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