UMC and CADENCE Deliver Digital Reference Flow for Advanced Processes

Cadence Encounter-Based Platform Validated for UMC’s 130-Nanometer
High-Speed Process

HSINCHU, Taiwan, and SAN JOSE, Calif.—Sept. 7, 2004 —UMC (NYSE:UMC) and Cadence Design Systems, Inc. (NYSE and NASDAQ:CDN) today announced the availability of a digital reference flow targeting system-on-chip (SoC) designs at 130 nanometers and below. The reference flow uses IP libraries and memories from Faraday Technology Corporation (TAIEX: 3035), a global provider of silicon-proven IPs and ASIC design services. This RTL-to-GDSII reference flow takes advantage of UMC's leading-edge technology that allows both high-speed and low-leakage transistors to be combined onto a single chip—ideal for wired and wireless applications. Based on the Cadence® Encounter^TM digital IC design platform, the reference flow is being validated in silicon using UMC's 130-nanometer logic (CMOS) high-speed process.

With increasing interdependencies between design and manufacturing at 130 nanometers and below, this integrated reference flow allows customers a predictable path from RTL to silicon by reducing the need for iterations in the design phase and decreasing mask re-spins while maintaining the quality of silicon (QoS). This is especially critical when designing multi-million-gate SoCs and provides a clear time-to-market advantage.

"UMC continues to strengthen its portfolio of SoC foundry solutions to help designers of complex system-on-chips more quickly realize silicon success,"said Ken Liou, director of UMC's Design Support Division. "By working closely with Cadence, we can ensure that the performance and capabilities of their digital IC solutions works smoothly with our process flow."

This reference flow incorporates leading Cadence technologies, including Encounter^TM RTL Compiler, First Encounter GPS (Global Physical Synthesis),
NanoRoute^TM, Fire & Ice QX, CeltIC^TM-NDC, VoltageStorm power analysis and Assura physical verification. It uses a "wires first" methodology to address key nanometer design issues, such as timing closure, signal integrity and power integrity.

"We are very pleased that the Faraday library and memories have been successfully integrated into the UMC and Cadence reference flow," said Hsin Wang, associate vice president of R&D at Faraday. "Our libraries have been optimized through all aspects of the flow to support floorplans, physical synthesis, legal placements, clock tree synthesis and power routing for digital designs. In addition, our library and memory views have been enhanced to enable power and signal integrity checks as part of the flow."

"No one company alone can address today's nanometer design challenges and industry disaggregation," said Jan Willis, senior vice president of Industry Marketing, Cadence. "Collaboration is essential for customer success. This digital reference flow is another milestone in our ongoing collaboration with UMC to enable customers to meet their time-to-market goals predictably."

Availability
The UMC and Cadence digital reference flow kit is currently available at no charge to UMC customers, from UMC sales representatives or accessible on-line through MyUMC (www.umc.com). For additional information on the Reference Flow, a data sheet is also available at URL http://www.umc.com/English/design/r.asp.

Web Seminar
On Oct. 5, 2004, UMC and Cadence will hold a free webinar on how to enhance design team productivity and silicon reliability with the UMC and Cadence Reference Flow. To register or obtain additional information on this webinar, visit URL (http://www.placeware.com/cc/cadence/join?id=Cadence+%2F+UMC+Digital+Ref
erence+&role=attend&pw=KBTQP9).

About UMC
UMC (NYSE: UMC, TSE: 2303) is a leading global semiconductor foundry that manufactures advanced process ICs for applications spanning every major sector of the semiconductor industry. UMC delivers cutting-edge foundry technologies that enable sophisticated system-on-chip (SOC) designs, including 90nm copper, 0.13um copper, embedded DRAM, and mixed signal/RFCMOS. UMC is also a leader in 300mm manufacturing; Fab 12A in Taiwan is currently in volume production for a variety of customer products, while Singapore-based UMCi has just entered volume production. UMC employs over 8,500 people worldwide and has offices in Taiwan, Japan, Singapore, Europe, and the United States. UMC can be found on the web at http://www.umc.com.

About Faraday Technology Corporation
Faraday Technology Corporation is a leading silicon IP and fabless ASIC vendor. The company's broad IP portfolio includes 32-bit RISC CPUs, DSPs, PHY/Controllers for USB 2.0, Ethernet, and Serial ATA. With more than 500 employees and 2003 revenue of $111 million, Faraday is the largest fabless ASIC company in all Asia-Pacific. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. For more information, please visit: http://www.faraday-tech.com

About Cadence
Cadence is the world's largest supplier of electronic design technologies and engineering services. Cadence products and services are used to accelerate and manage the design of semiconductors, computer systems, networking equipment, telecommunications equipment, consumer electronics, and other electronics based products. With approximately 4,850 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and trades on both the New York Stock Exchange and Nasdaq under the symbol CDN. More information is available at www.cadence.com.

Cadence, the Cadence logo, Fire & Ice, FirstEncounter and VoltageStorm are registered trademarks of Cadence Design Systems, Inc. Assura, Encounter, NanoRoute and RTL Compiler are trademarks of Cadence Design Systems, Inc. All trademarks are the property of their respective owners.

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