聯華電子擴展對於X Architecture的支援:
成為業界第一家提供通過驗證之90奈米設計規則的純晶圓專工公司
現已可為無晶圓廠設計公司客戶提供90奈米X Architecture晶片製造服務
聯華電子今日(11日)與X Initiative組織共同宣佈，針對採用90奈米製程設計的X
Architecture晶片推出通過驗證的設計規則，成為業界第一家提供此設計規則的純晶圓專工公司。聯華電子現已可接受無晶圓廠半導體公司，以及其整合元件廠夥伴的X
Architecture設計，採用聯華電子90奈米製程投片生產。
X Architecture設計架構除了傳統的直角式曼哈頓繞線，更提供了新的斜角晶片佈線方式。藉由明顯地減少新設計的總線長及通孔數目，或是在各佈線層內之互連孔，X
Architecture可以大幅提昇晶片的執行效能、節省成本並且降低耗電。
“聯華電子在支援X Architecture設計，並且運用其斜角佈線方式以獲得效能與成本優勢上，持續位居領導者的地位。”聯華電子系統單晶片設計總工程師林子聲先生表示。“透過此一努力成果，無晶圓廠設計公司將可建立包含斜角式佈線的90奈米晶片，並且有信心其設計得以在聯華電子得到由設計到製造的完整支援。”
聯華電子於2003年成為第一家加入X Initiative的純晶圓專工公司，同時也是業界第一家宣佈可於0.13微米製程接受X Architecture晶片投片生產的晶圓專工公司。
“聯華電子宣佈為90奈米製程上的X Architecture設計提供世界級的製造服務，預告了第一個X產品即將於今年問世，”X Initiative指導委員暨益華電腦新事業育成計劃技術長Aki
Fujimura先生表示，“對於要求高效能並且對於成本敏感的無晶圓廠設計公司市場，X Architecture所具備的效能與成本上的優勢，結合了先進90奈米製程，將是一個十分強而有力的組合。”
About the X Architecture
The X Architecture, the first production-worthy approach to the pervasive
use of diagonal interconnect, reduces the total interconnect, or wiring,
on a chip by up to 20 percent and via-counts by up to 30 percent, resulting
in significant improvements in chip performance, power and cost. For
the past 20 years, chip design has been primarily based on the de facto
industry standard "Manhattan" architecture, named for its
right-angle interconnects resembling a city-street grid. The X Architecture
rotates the primary direction of the interconnect in the fourth and
fifth metal layers by 45 degrees from a Manhattan architecture. The
new architecture maintains compatibility with existing cell libraries,
memory cells, compilers and IP cores by preserving the Manhattan geometry
of metal layers one through three.
About the X Initiative
The X Initiative, a group of leading companies from throughout the semiconductor
industry, is chartered with accelerating the availability and fabrication
of the X Architecture, a revolutionary interconnect architecture based
on the pervasive use of diagonal routing. The X Initiative's five-year
mission is to provide an independent source of education about the X
Architecture, to facilitate support and fabrication of the X Architecture
through the semiconductor industry design chain, and to survey usage
of the X Architecture to track its adoption. Representing leaders spanning
the entire design-to-silicon supply chain, X Initiative members include:
Applied Materials, Inc.; ARM; ASML Netherlands B.V.; Cadence Design
Systems, Inc.; Canon U.S.A. Inc.; Dai Nippon Printing (DNP); DuPont
Photomasks, Inc.; GDA Technologies, Inc.; HPL Technologies, Inc.; Hoya
Corporation; IN2FAB Technology Ltd.; Infineon Technologies AG; JEOL,
Ltd.; KLA-Tencor Corporation; Leica Microsystems AG; Matsushita Electric
Industrial Co., Ltd.; MicroArk Co. Ltd.; Nikon Corporation; NuFlare
Technology Inc.; PDF Solutions, Inc.; Photronics, Inc.; Prolific Inc.;
RUBICAD Corporation; Sagantec; Sanyo Electric Co., Ltd.; Silicon Logic
Engineering, Inc.; SiliconMap, LLC.; Silicon Valley Research Inc.; STMicroelectronics;
Sycon Design, Inc.; Tensilica, Inc.; Toppan Printing Co.; Toshiba Corporation;
Trecenti Technologies, Inc.; TSMC; UMC; Virage Logic, Inc.; Virtual
Silicon Technology, Inc.; Zenasis Technologies, Inc.; and Zygo Corporation.
Membership is open to all companies throughout the semiconductor design
chain. Materials can be found at http://www.xinitiative.org.
Cautionary Note Regarding Forward-looking Statements
This release contains forward-looking statements (including, without
limitation, information regarding semiconductor design, production and
performance improvements resulting from the X Architecture, the compatibility
of the X Architecture with current technology, the future success of
X Architecture technology and the ability of certain of the X Initiative
members to support the X Architecture) that involve risks and uncertainties
that could cause the results of X Initiative members and other events
to differ materially from managements' current expectations. Actual
results and events may differ materially due to a number of factors
including, among others: future strategic decisions made by the X Initiative
members; failure of the X Architecture to enable the production of designs
that are feasible and competitive with current designs or future alternatives;
future strategic decisions made by X Initiative members or others that
inhibit the development of the X Architecture; demand for advanced semiconductors
that are developed using the X Architecture; cost feasibility of the
production of semiconductors designed using the X Architecture; and
the rapid pace of technological change in the semiconductor industry.
The matters discussed in this press release also involve risks and uncertainties
described in the most recent filings of the X Initiative members with
the Securities and Exchange Commission. The X Initiative members, individually
or collectively, assume no obligation to update the forward-looking
information contained in this release.
Note From UMC Concerning Forward-Looking Statements
Some of the statements in the foregoing announcement are forward looking
within the meaning of the U.S. Federal Securities laws, including statements
about future outsourcing, wafer capacity, technologies, business relationships
and market conditions. Investors are cautioned that actual events and
results could differ materially from these statements as a result of
a variety of factors, including conditions in the overall semiconductor
market and economy; acceptance and demand for products from UMC; and
technological and development risks.
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