聯華電子與全球半導體設計製造軟體暨IP領導廠商新思科技 (Synopsys)，今日 (12日) 共同宣佈，雙方已擴展夥伴關係，將於聯華電子 28 奈米 HLP Poly SiON 製程平台上開發新思科技的 DesignWare^® IP。延續之前在聯華電子 40 奈米與 55 奈米製程的成功經驗，新思科技將會於聯華電子 28 奈米 HLP Poly SiON 製程上，導入其經驗證的 DesignWare 嵌入式記憶體，以及邏輯元件資料庫。此次合作將晶片設計公司得以在較低的風險下，設計出高速低功耗的系統單晶片，並取得更快的產品上市時程。兩家公司長久以來的合作，涵跨了聯華電子 0.18 微米至  28 奈米製程，而成功研發出的高品質 DesignWare IP，正是這份穩固合作關係下的豐碩成果。

聯華電子的 28 奈米 HLP 製程除了保留傳統 Poly SiON 技術的成本競爭力，更採用了創新的製程技術，具備絕佳的性價比，與業界其他 28 奈米 Poly SiON 製程相比較，大幅提升了效能與功耗表現。此一強化的 28 奈米 Poly SiON 製程，提供晶片設計者由 40 奈米製程到 28 奈米製程更順暢的移轉路徑，使晶片設計能夠輕易地導入製程並且快速上市。

“聯華電子與新思科技已在多個製程世代上，緊密配合了許多年，”聯華電子負責客戶工程暨矽智財研發設計支援的簡山傑副總表示，“新思科技是值得信賴的矽智財領導廠商，我們與新思科技在 28 奈米上繼續攜手，意味著雙方在協助客戶發展尖端系統單晶片設計上的共同承諾。聯華電子十分期待與我們的客戶共同將這些新世代產品推出上市。”

新思科技廣泛的產品組合，包含了經速度，功耗與位面積最佳化，並經過 10 億顆以上晶片驗證的嵌入式記憶體與標準元件資料庫。DesignWare 嵌入式記憶體與邏輯元件資料庫包括了先進的電源管理功能，例如淺待機，深待機與關機，還有一個電源最佳化套件，藉以延長手持式應用產品的電池壽命。此外，新思科技整合型 STAR Memory System^® 測試與修復解決方案，可讓晶片設計公司達到更高測試品質與嵌入式記憶體良率，同時降低晶片面積。

“新思科技與晶圓專工領導者聯華電子此次攜手合作，將使雙方客戶得以採用聯華電子 28 奈米製程驗證過的矽智財，用來差異化其系統單晶片的設計。”新思科技矽智財與系統行銷副總經理 John Koeter 表示。“我們在提供先進製程的高品質矽智財上，有著豐富經驗與紀錄，因此能給予晶片設計公司信心，在整合 DesisnWare IP 到系統單晶片設計時，可降低風險，並可望達成首次試產即成功之目標。”

支援聯華電子 28 奈米 HLP 製程的新思科技 DesignWare 嵌入式記憶體與邏輯元件資料庫，預計於 2012 年第二季推出。新思科技的晶圓專工矽智財支援專案中的部分內容，包含了於聯華電子 28 奈米 HLP 製程平台上，免費提供嵌入式記憶體與邏輯元件資料庫給合乎資格的獲授權者使用。

聯華電子的 28 奈米 Poly SiON 技術現已在客戶產品試產中，並可接受客戶 design-in。

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and Verification IP for widely used protocols, analog IP, embedded memories, logic libraries and ARC^TM processor cores. In addition, Synopsys offers SystemC^TM transaction-level models to build virtual prototypes for rapid, pre-silicon development of software. With a robust IP development methodology, reuse tools, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware. Follow us on Twitter at http://twitter.com/designware_ip. 

Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Forward Looking Statements
This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including statements regarding the reduced risk, improved time to market, higher test quality and yield, lower chip area, and dates of delivery of embedded memories and logic libraries, and the DesignWare USB 3.0, USB 2.0, DDR3/2, and PCI Express 2.0 PHYs. These statements are based on current expectations and beliefs. Actual results could differ materially from those described by these statements due to risks and uncertainties including, but not limited to, unforeseen production or delivery delays, failure to perform as expected, and other risks detailed in Synopsys' filings with the U.S. Securities and Exchange Commission, including those described in the "Risk Factors" section of the latest Quarterly Report on Form 10-Q for the fiscal quarter ended April 30, 2011.

Synopsys, ARC, DesignWare, and STAR Memory System are trademarks or registered trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners