UMC's MS/RFCMOS platform is based on our standard logic process to deliver a high performance, low cost solution for RFIC designs. UMC's MS/RFCMOS technologies span from 0.25µm to 40nm process nodes, with 28nm capability being developed.

Mixed Signal(MS)/RFCMOS Brochure (pdf, 1,955kb)

Technology key features include:

• High speed RF N/PMOS
• Advanced RF model with multi-dimensional device scaling range
• Enhanced thermal noise model
• High precision poly resistors
• High tuning ratio varactors
• Scalable inductors/capacitors.

The successful design of an SoC's analog/RF portion requires a solution that provides access to EDA technology as well as foundry technology and design support. UMC's remarkable MS/RFCMOS performance is ahead of the ITRS industry roadmap, with comprehensive support:

-	Foundry Design Kit, a user-friendly platform that integrates schematic entry, simulation, layout editor, parameter extraction, and layout check all together in one package.
-	Unique Virtual Inductor/Capacitor Libraries are also integrated with UMC's RF Foundry Design Kit, providing fast inductor/capacitor simulation for RF designers who can now design optimized inductors/capacitors within a few minutes.

Applications such as WLAN, Bluetooth, 3/4G cellular, GPS, Gigabit Ethernet, and portable communication devices are fueling the demand for advanced MS/RFCMOS processes.