SAN JOSE, Calif., February 25, 2002 - Xilinx, Inc. (NASDAQ:XLNX) and UMC today unveiled the industry's first CPLD process technology scalable to 100 nanometer. Xilinx began shipping samples of its 0.18 micron, 1.8 volt CoolRunner-II RealDigital CPLDs, based on the new process technology, late in 2001 and plans introduction of a 0.13 micron CPLD process in the first half of 2003. The 0.13 micron devices will operate at 1.5 to 1.2 volt.
"The manufacturing process that Xilinx and our foundry partner UMC jointly developed for our CoolRunner-II RealDigital devices is highly modular and scalable," said Evert Wolsheimer, vice president and general manager of the CPLD Division at Xilinx. "We are well on our way to scaling to 0.13 micron, and expect to have products based on that technology early next year. Non-volatile technologies used for CPLDs are traditionally two generations behind logic processes used for FPGAs. Our new approach allows us to close most of that gap, and allows a higher synergy between our CPLD and FPGA technology and design engineers, while maintaining the non-volatile character of the CPLD product. We expect to introduce 100 nanometer CPLDs no more than six months after the introduction of 100 nanometer FPGAs."
"The development of this new CPLD manufacturing process is a natural extension of the longstanding relationship between UMC and Xilinx," Wolsheimer said. UMC, based in Taiwan, has been the chief supplier of Xilinx Virtex and Spartan FPGA wafers for several years and also manufactures the Xilinx XC9500 (5 volt), XC9500XL (3.3 volt) and XC9500XV (2.5 volt) CPLDs in addition to the first and second generations of CoolRunner devices.
Fu Tai Liou, chief officer of sales and marketing for UMC, said, "UMC and Xilinx have had a long history of cooperating in the delivery of industry leading FPGA and CPLD products built using UMC's state-of-the-art foundry technology. We are happy to continue this productive relationship through the acceleration of the CPLD roadmap with this new, highly scalable technology platform."
XilinxCoolRunner-II RealDigital CPLDs feature the Fast Zero Power(FZP) design technology that provides both high performance and ultra low-power consumption and no cost penalty. Using the FZP all-digital core, CoolRunner-II devices offer a new alternative to traditional CPLDs that use analog sense amplifiers and consume much more power