聯電與先進高密度 SoC 嵌入式記憶體供應商 MoSys 公司今 (18) 日共同宣佈，聯電取得 MoSys 公司 1T-SRAM® 技術之授權。此舉更加強了聯電現有的 IP 服務，提供更適合聯電製程的記憶體給 SoC 設計工程師使用。聯電將可直接提供客戶目前非常熱門的 1T-SRAM 記憶體；聯電的 0.18、0.15、0.13 微米以及 90 奈米製程皆可適用。聯電並將此高密度 (ultra-high density) 1T-SRAM 記憶體技術客製化，進而提供更多重的選擇。

聯電市場開發部的副總經理李俊德博士表示：記憶體在晶片設計成功與否中扮演著非常重要的角色，未來記憶體將可能占許多 SoC 晶片面積的 50% 以上。因此，我們希望可提供更多適用於聯電製程的優質記憶體巨集 (memory macros) 並保有為客戶量身製作的空間。除了聯電目前提供的 6T 及 trench (溝道) 記憶體，1T-SRAM 將會是另一種不同的選擇。此次很高興可與業界 1T-SRAM 技術首屈一指的供應商 MoSys 公司合作。

MoSys 公司副總經理兼 Intellectual Property 部門總經理 Mark-Eric Jones 先生表示：聯電是晶圓專工業的龍頭之一，我們很高興聯電決定採用 MoSys 之技術。此協議將持續以往雙方的合作關係，並使聯電能直接提供設計支援及服務給客戶。這次的合作將可使更多設計工程師享受到 MoSys 的 1T-SRAM 嵌入式記憶體 (embedded momory) 技術，其中包含了 low standby power 1T-SRAM-M™ 技術以及新推出的 1T-SRAM-R™ 技術。1T-SRAM-R™ 新技術藉由 Transparent Error Correction™ (TEC™) 來排除不必要的雷射修補 (laser repair) 也同時提高良率，可信賴性，以及 soft error rates。藉由與聯電之合作，我們的巨集可望被更廣泛地被使用。

兩家公司在此協議前已有合作關係。MoSys 提供適合聯電 0.15 微米及 0.18 微米標準邏輯製程的 1T-SRAM 記憶體巨集，客戶可經由聯電的 Gold IP program 找到合適之技術。

這次協議中所提供的 1T-SRAM，是特別為聯電製程所量身訂作，將由聯電負責銷售。根據聯電的技術藍圖 (Technology roadmap)，適用於 0.15 微米及 0.18 微米製程並經驗證過的 1T-SRAM 技術，可望在 2003 年第一季提供；而適用於 0.13 微米及 90 奈米製程之技術可望分別在 2003 年第二季及下半年度提供。

Since MoSys first made its 1T-SRAM memory technology available for license, MoSys' licensees have now shipped a total of more than 45 million chips incorporating 1T-SRAM embedded memory technology, demonstrating the excellent manufacturability of the technology in a wide range of silicon processes and applications.

Founded in 1991, MoSys (NASDAQ: MOSY), develops, licenses and markets innovative memory technologies for semiconductors. MoSys' patented 1T-SRAM technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. The single transistor bit cell used in 1T-SRAM technology results in the technology achieving much higher density than traditional four or six transistor SRAMs while using the same standard logic manufacturing processes. 1T-SRAM technologies also offer the familiar, refresh-free interface and high performance for random address access cycles associated with traditional SRAMs. In addition, this technology can reduce operating power consumption by a factor of four compared with traditional SRAM technology, contributing to making it an ideal technology for embedding large memories in System on Chip (SoC) designs. 1T-SRAM technologies are in volume production both in SoC products at MoSys' licensees as well as in MoSys' standalone memories. MoSys is headquartered at 1020 Stewart Drive, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.

Some of the statements in the foregoing announcement are forward looking within the meaning of the U.S. Federal Securities laws, including statements about future outsourcing, wafer capacity, technologies, business relationships and market conditions. Investors are cautioned that actual events and results could differ materially from these statements as a result of a variety of factors, including conditions in the overall semiconductor market and economy; acceptance and demand for products from UMC; and technological and development risks.

1T-SRAMR is a MoSys trademark registered in the U.S. Patent and Trademark Office. All other trade, product, or service names referenced in this release may be trademarks or registered trademarks of their respective holders.