典禮於聯電舉行，慶祝美商智霖成為聯電 0.13 及 0.15 微米製程，以 12 吋晶圓量產的最大客戶。聯電今日 (27日) 舉行頒獎典禮，頒發 "客戶感謝獎" 予美商智霖，表 彰其在先進的可編程閘陣列 (FPGA) 全系列產品皆採用聯電的 0.13 及 0.15 微米製程生產，並達成 12 吋晶圓量產之重要里程碑。

"客戶感謝獎" 主要為慶祝聯電及美商智霖在業界共同締造的成就。特別值得一提的是，身為可編程邏輯晶片領導廠商，美商智霖在 FPGA 產品市場佔有率已超過六成；透過與聯電的緊密合作，美商智霖更成為全球以 12 吋晶圓產出晶片最大量的 IC 設計廠商之一。

業界最先進的 FPGA 系列產品 "美商智霖的 0.13 Virtex-IIO Pro family" 已以極高的良率於聯電台南 Fab 12A 量產。藉由 12 吋晶圓的標準化量產，美商智霖可提供其客戶最佳成本效益，因為每片 12 吋晶圓可產出相當於 8 吋晶圓 2.5 倍的晶片數量。美商智霖在聯電量產的產品尚有：Virtex-EO, Virtex-IIO, Virtex-II Pro 及 Spartan-IIEO FPGAs。

聯電美洲業務群總經理劉富臺表示：聯電持續專注地與夥伴客戶們合作，全力協助他們由聯電提供的先進製程技術獲取最大收益。聯電與美商智霖合作多年來已建立許多成果，我們非常高興雙方的合作關係又往前邁開一大步。美商智霖因結合聯電先進的製程技術與 12 吋晶圓製造優勢，得以更進一步維持其全世界最先進 FPGA 產品領導者的地位。

美商智霖產品技術部副總經理 Vincent Tong 表示：美商智霖很高興與聯電合作並獲此殊榮。我們將共同持續以世界最先進的製程技術，提供最低成本、最高效率的 FPGA 給我們客戶。在聯電先進的 12 吋晶圓廠量產，我們目前採用的是 0.13 微米製程，不久後將採用更先進 90 奈米製程，使我們能夠持續穩固美商智霖在半導體科技業界領導者的地位。

聯電目前已量產多種不同應用領域的 0.13 微米製程產品，並正轉移多種設計到 12 吋晶圓製程。在 2002 年底，0.13 微米製程的營收已達總銷售額的 6%。

Virtex-II FPGAs fundamentally redefined the programmable logic landscape, propelling FPGAs from the realm of glue logic into the realm of high performance programmable systems. Today, cumulative revenues from the Virtex-II series are estimated to exceed 40x that of the nearest competitor. The innovative Virtex-II IP-Immersion architecture enables integration of both hard and soft intellectual property (IP), enhanced system memory, and lightning-fast DSP performance, providing the best platform for advanced digital designs in the industry.

With eight devices produced on 300 mm, the Virtex-II Pro family is the world's first and only FPGA to offer integrated PowerPC embedded technology and 3.125 Gbps serial transceivers. Virtex-II Pro devices include these multiple PowerPC CPUs and multi-gigabit serial transceivers at no additional charge, providing unequaled capability and value for today's system design requirements. Xilinx is the only PLD provider to offer over 6,700 logic cells and 500K bits of embedded block memory plus an embedded PowerPC processor and four RocketIO serial transceivers for under $30*.

For high volume applications requiring lower densities, Xilinx offers the world's lowest cost FPGA product line, the Spartan-IIE family, also produced on 300 mm wafers. At up to 514 pins, Spartan-IIE FPGAs deliver the industry's lowest cost per pin, and most comprehensive programmable I/O support. Designers have 100 percent greater I/O capacity with Xilinx Spartan-IIE devices than any other competing FPGA solution in the same density range. With the industry's lowest cost per pin, designers currently using gate arrays or ASICs can easily migrate to Spartan FPGAs without the associated high NRE (non-recurring engineering) costs, long design cycles or risks.