With today's proliferation of low power applications, lowering energy consumption without sacrificing performance has become a critical concern for designers of chips used to power today's digital economy. UMC is committed to providing customers with the latest low power solutions, including low power and low leakage transistor options for 90nm and below technologies. UMC also offers several different kinds of reference flows for low power designs, providing customers with a streamlined path to silicon that allows our customers designing power efficient SoCs to capitalize on today's low power market opportunities.

For advanced technology processes, UMC cooperates with EDA industry leaders to provide the latest EDA solutions integrated with UMC IPs. In recent years, there has been an increasing focus on power gating solutions. As such, UMC has also prepared an integrated set of low power kits that focus on power gating, including header/footer cells, retention registers, isolation cells, always-on cells, etc. All cells were successfully validated through RTL-to-GDS flows using different EDA tools, including Cadence, Synopsys, and Magma. Customers are welcome to apply these reference flows to their projects by inquiring with a UMC sales representative.