SUNNYVALE, Calif, November 20, 2000 - UMC (NYSE: UMC), a world leading semiconductor foundry, today announced its Silicon Shuttle?program for 2001, expanding substantially beyond the 2000 program. The Silicon Shuttle program offers customers the opportunity to verify their advanced designs and prototypes in UMC silicon, helping to minimize risks and costs. The new 2001 program provides greater frequency and a richer offering of technologies, including several Silicon Shuttle wafers dedicated to mixed mode and RF CMOS as well as UMC's 0.13-micron technology. As before, the mask cost is split among multiple customers by allowing each customer to purchase "seats" on the same mask, reducing individual customer costs to a fraction of the total. Addressing customers' time-to-market considerations, the Silicon Shuttle program will leverage UMC's industry-leading manufacturing cycle times. Silicon Shuttle cycle times in 2001 will be driven on the UMC "hot lot" schedule (approximately one day per photolithography layer), enabling fab manufacturing cycle times of less than four weeks for six-layer metal 0.18-micron wafers. "Customers can now rely on UMC Silicon Shuttle test runs in the same way they have learned to depend on us for delivering their own dedicated engineering lots", stated Peter Chang, CEO of UMC. "This 'hot lot' schedule is a first in the foundry industry and another indication of our commitment to listen and respond to our customers' needs, in this particular instance for rapid and affordable prototyping." |
New Silicon Shuttle Options for 2001 |
Several 0.13-micron technology Silicon Shuttle wafers for logic and mixed mode technology are scheduled in 2001. UMC's 0.13-micron technology is generally considered to be the industry's most advanced, with full copper/low-k interconnect technology, coupled with transistor switching delays below 10 picoseconds, enabling microprocessor clock frequencies to exceed 1 Gigahertz. Furthermore, extensive analog options will also be offered on several dedicated 0.13-micron mixed-signal (digital and analog) wafers, enabling true system-on-chip (SOC) functionality. These options include UMC metal-insulator-metal (MIM) capacitors recognized for their outstanding Q-values, low threshold voltage transistors, and copper inductors. "The Silicon Shuttle program opens the door for companies wishing to benefit from the tremendous advantages our 0.13-micron copper/low-k technology is able to bring to their designs," said Jim Kupec, senior vice president of worldwide sales and marketing for UMC. " The shuttle enables 0.13-micron product prototyping to be extremely affordable, making this advanced process more widely available to a broader range of new and existing customers." Several Silicon Shuttle options (low Vt transistors, MIM capacitors, and inductors) are also available for Bluetooth, the fast emerging world standard protocol for connecting wireless peripherals in the consumer and communication spaces. UMC has worked with Bluetooth OEMs and IP creators to develop RF CMOS technologies that will make Bluetooth chips more cost-effective relative to the BiCMOS technology that Bluetooth samples and prototypes are being manufactured by currently. Customers and IP providers may leverage this new technology using the 0.25 and 0.18-micron RF CMOS and mixed-mode Silicon Shuttle wafers. With several million Bluetooth units expected to ship in 2002, verifying Bluetooth designs in silicon at an early stage becomes critical for designers of this advanced wireless technology. Note From UMC Concerning Forward-Looking Statements Silicon Shuttle is a registered service mark of UMC. ASICplus is a service mark of UMC. |
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