FREMONT, Calif., and HSINCHU, Taiwan, July 21, 2005 - UMC (NYSE: UMC, TSE: 2303), a world-leading semiconductor foundry and Virage Logic Corporation (Nasdaq: VIRL), a pioneer in Silicon Aware IP^TM and leading provider of semiconductor intellectual property (IP) platforms, have announced an agreement where Virage Logic will extend its IP and circuit design expertise to jointly work with UMC to enable optimal IP development for UMC's 65nm process technology. This early engagement partnership will help accelerate adoption of UMC's next generation technology platform and provide a predictable roadmap for enhancements of key IP structures such as memory bit cells.

"UMC's strong commitment to technical leadership is underscored with this agreement," said Alex Shubat, Chief Technical Officer of Virage Logic. "Because critical IP design intent has been factored in from the start, the resulting process will provide for optimal area, performance, power and yield much sooner than with traditional process development flows."

The agreement calls for Virage Logic to collaborate and consult with UMC's technology and design support teams to analyze process parameters critical for design of key IP elements such as memory, logic and I/Os in order to optimize area, speed, performance and manufacturing yield of System-on-Chips (SoCs).

"At 65nm, design experts and process technology teams need to synchronize much earlier than previous generations to address the new challenges brought by the increasing complexities of deep sub-micron technology nodes," said Patrick T. Lin, Chief SoC Architect, System and Architecture Support Group, UMC. "Virage Logic's expertise and understanding of the relationship between advanced process parameters and semiconductor IP requirements will be a valuable asset to this effort, and we look forward to their contributions to help accelerate the acceptance of our 65nm process."

UMC (NYSE: UMC, TSE: 2303) is a leading global semiconductor foundry that manufactures advanced process ICs for applications spanning every major sector of the semiconductor industry. UMC delivers cutting-edge foundry technologies that enable sophisticated system-on-chip (SOC) designs, including 90nm copper, 0.13um copper, and mixed signal/RFCMOS. UMC is also a leader in 300mm manufacturing; Fab 12A in Taiwan and Singapore-based Fab 12i are both in volume production for a variety of customer products. UMC employs approximately 10,500 people worldwide and has offices in Taiwan, Japan, Singapore, Europe, and the United States. UMC can be found on the web at http://www.umc.com.

Founded in 1996, Virage Logic Corporation (Nasdaq:VIRL) rapidly established itself as a technology and market leader in providing advanced embedded memory intellectual property (IP) for the design of complex integrated circuits. Today the company is a global leader in semiconductor IP platforms comprising embedded memories, logic, and I/Os and is pioneering the development of a new class of IP called Silicon Aware IP. Silicon Aware IP tightly integrates Physical IP (memory, logic and I/Os) with the embedded test, diagnostic, and repair capabilities of Infrastructure IP to help ensure manufacturability and optimized yield at the advanced process nodes. Virage Logic's highly differentiated product portfolio provides higher performance, lower power, higher density and optimal yield to foundries, integrated device manufacturers (IDMs) and fabless customers who develop products for the consumer, communications and networking, hand-held and portable, and computer and graphics markets. The company uses its FirstPass-Silicon^TM Characterization Lab for certain products to help ensure high quality, reliable IP across a wide range of foundries and process technologies. Headquartered in Fremont, California, Virage Logic has R&D, sales and support offices worldwide. For more information, visit www.viragelogic.com.

Safe Harbor Statement under the Private Securities Litigation Reform Act of 1995:
Statements made in this news release, other than statements of historical fact, are forward-looking statements, including, for example, statements relating to trends, business outlook, products, customer relationships and our financial results for the fiscal quarter ended June 30, 2005. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to forecast its business, including expected revenues, royalties and net loss for the third fiscal quarter ended June 30, 2005 and possible discrepancies between the preliminary results and the final results to be announced; the company's ability to ship against existing orders or customer deadlines; Virage Logic's ability to maintain and develop new relationships with third-party foundries and integrated device manufacturers; adoption of Virage Logic's technologies by semiconductor companies and increases or fluctuations in the demand for their products; the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies; business and economic conditions generally and in the semiconductor industry in particular; competition in the market for semiconductor IP platforms; and other risks including those described in the company's Annual Report on Form 10-K for the period ended September 30, 2004, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic's website (www.viragelogic.com) or from the SEC's website (www.sec.gov), and in news releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.

Note From UMC Concerning Forward-Looking Statements
Some of the statements in the foregoing announcement are forward looking within the meaning of the U.S. Federal Securities laws, including statements about future outsourcing, wafer capacity, technologies, business relationships and market conditions. Investors are cautioned that actual events and results could differ materially from these statements as a result of a variety of factors, including conditions in the overall semiconductor market and economy; acceptance and demand for products from UMC; and technological and development risks.

All trademarks are the property of their respective owners and are protected herein.