SUNNYVALE, Calif.(January 13, 2003) - MoSys, Inc. (NASDAQ: MOSY) the industry's leading provider of high density SoC embedded memory solutions, and UMC (NYSE: UMC), a world-leading semiconductor foundry, today announced that MoSys' 1T-SRAM-RÔ technology incorporating Transparent Error CorrectionÔ is silicon-proven in UMC's 0.13 micron logic process. With this milestone, MoSys' customers can now access 1T-SRAM memory technology that has been verified on three of UMC's standard logic processes: 0.18, 0.15 and 0.13 micron.

"Given UMC's position as one of the world's top foundries, we are very pleased that our technology is now silicon-proven in their latest generation standard logic process," stated Mark-Eric Jones, vice president and general manager of intellectual property at MoSys. "This announcement demonstrates the strong relationship between UMC and MoSys.

1T-SRAM-R technology delivers our mutual customers the highest density memory solution in a 0.13 micron standard logic process with the advantages of increased yield and reliability combined with dramatically reduced soft error rate and elimination of laser repair."

Dr. C. T. Lee, vice president at UMC said, "MoSys continues to provide 1T-SRAM macros that meet the memory requirements of a diverse audience. With this latest accomplishment, designers producing 0.13 micron SoC designs can incorporate 1T-SRAM-R technology, with the confidence that MoSys' intellectual property (IP) has been proven in silicon. Having optimal memory solutions is important as memory will take up to half of the die area in many upcoming SoC designs."

The 1T-SRAM-R technology for 0.13 micron silicon is currently available from MoSys, and is slated to be listed in UMC's IP Master online design resource and support center in mid-February. UMC will also offer customer specific 1T-SRAM macros, based on customer requirements, directly to customers in Q2 2003.

MoSys' licensees have shipped more than 50 million chips incorporating 1T-SRAM embedded memory technology, demonstrating the excellent manufacturability of the technology in a wide range of silicon processes and applications.

Founded in 1991, MoSys (NASDAQ: MOSY), develops, licenses and markets innovative memory technologies for semiconductors. MoSys' patented 1T-SRAM technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. The single transistor bit cell used in 1T-SRAM technology results in the technology achieving much higher density than traditional four or six transistor SRAMs while using the same standard logic manufacturing processes. 1T-SRAM technologies also offer the familiar, refresh-free interface and high performance for random address access cycles associated with traditional SRAMs. In addition, this technology can reduce operating power consumption by a factor of four compared with traditional SRAM technology, contributing to making it an ideal technology for embedding large memories in System on Chip (SoC) designs. 1T-SRAM technologies are in volume production both in SoC products at MoSys' licensees as well as in MoSys' standalone memories. MoSys is headquartered at 1020 Stewart Drive, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.

Some of the statements in the foregoing announcement are forward looking within the meaning of the U.S. Federal Securities laws, including statements about future outsourcing, wafer capacity, technologies, business relationships and market conditions. Investors are cautioned that actual events and results could differ materially from these statements as a result of a variety of factors, including conditions in the overall semiconductor market and economy; acceptance and demand for products from UMC; and technological and development risks.

1T-SRAM® is a MoSys trademark registered in the U.S. Patent and Trademark Office. All other trade, product, or service names referenced in this release may be trademarks or registered trademarks of their respective holders.