2.5D IC

UMC’s 2.5D IC technologies use advanced redistribution layer (RDL) and through-silicon via (TSV) processes to enable high-density interconnections. In addition to silicon interposers, we offer silicon bridge solutions that can be embedded in substrates, fan-out panel-level packages (FOPLP), or fan-out wafer-level packages (FOWLP). The platform can also integrate deep trench capacitors (DTCs), allowing chips bonded to the interposer or bridge to benefit from local capacitance.

• High-density interconnection: RDL and TSV processes support dense chip-to-chip connections.
• Flexible platform options: Silicon interposers and silicon bridges are available for different packaging formats.
• Integrated DTC technology: Provides localized noise decoupling and voltage regulation to reduce transient voltage fluctuations and mitigate the impact of power integrity on processor performance.
• Assembly and supply-chain support: UMC works with qualified outsourced semiconductor assembly and test (OSAT) partners to support pathfinding and mass production. Services include wafer grinding, dicing, and chip-to-interposer bonding.

UMC’s 2.5D IC solution is designed for compute-intensive applications such as AI accelerators, high-performance computing (HPC), and data centers. It meets the requirements of AI model training and inference workloads for high-speed data transfer, signal integrity, and power integrity.

UMC’s 2.5D IC solution enables high-density lateral interconnects.