55 / 65 / 90nm

  • Introduction
  • UMC's mature nodes across 55nm, 65nm, and 90nm offer multiple solutions.

     

    The 55nm standard performance (SP) node offers a 90% optical shrink from the 65nm baseline, reducing die size while maintaining performance. UMC also provides 55nm Low Power (LP) process and 55nm Ultra-Low Power (ULP) options.

     

    The 65nm SoC platform supports standard performance (SP), Low Leakage (LL), and Low Power (LP) configurations, with optional mixed-signal and RFCMOS integration for wireless designs.

     

    UMC offers low-k or FSG for its 90nm manufacturing, giving customers the flexibility to choose the dielectric material best suited for their particular product application. Companies demanding performance, density, and power efficiency will benefit from UMC's 90nm technology.

     

    All nodes feature comprehensive IP enablement, including standard cell libraries, I/O libraries, memory compilers, one-time programmable (OTP) memory, and interface IP for fast design integration.

     

    These technologies serve various market sectors, including Audio, timing controllers (TCON), I/O, Bluetooth, Wi-Fi analog die etc.

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